Cache Line Coloring Procedure Placement Using Real and Estimated Profiles

Efficient exploitation of the available cache memory space can have a significant improvement in program performance. By carefully restructuring a program such that temporally local sequences of instructions are mapped to different portions of the cache, fewer cache conflicts will result. In this paper we present a link-time procedure mapping algorithm which views the cache as a colored address space, each color representing a different cache line. The idea of coloring is borrowed from the register allocation problem. We consider the size of the cache and the size of a cache line in this work, when coloring procedures to indicate the current mapping of the procedure in the cache space. This algorithm takes as input a weighted program call graph, with nodes representing procedures and edge weights representing call frequencies. This graph is used as input to our color-based mapping algorithm to provide an improved program layout. The results in this paper are presented for reducing the first generation conflicts (mapping conflicts between a parent and a child). In this work we also describe a methodology of weighting a program call graph, without the aid of dynamic profiles, and use this to guide our coloring algorithm. We refer to this strategy as statically generating a call graph. We employ static branch prediction to estimate program behavior, which in turn is used to weight edges between procedures in the program call graph. Using profile-based weighted call graphs, our algorithm reduces on average the instruction cache miss rate by 40% over the original program mapping and by 17% over the mapping algorithm of Pettis and Hansen [21]. Using statically-formed program call graphs, our coloring algorithm improves performance by 20% on average over the original program mapping.